Principal Or Sr. Principal Digital Verification Engineer (ASIC )

Requisition ID: R10033559

Category: Engineering Location: Beavercreek - OH, United States of America Citizenship Required: United States Citizenship Clearance Type: Secret Telecommute: No- Teleworking not available for this position Shift: 1st Shift (United States of America) Travel Required: Yes, 10% of the Time Positions Available: 2

At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people's lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nation's history - from the first flight across the Atlantic Ocean, to stealth bombers, to landing on the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join forces to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work — and we have an insatiable drive to do what others think is impossible. Our employees are not only part of history, they're making history.

Join Northrop Grumman Mission Systems Sector (NGMS) a leading global provider of secure software-defined, hardware enabled mission systems. Our company is pioneering capabilities in a wide variety of technologies that keep our nation and our allies safe from undersea to space and cyberspace.

Our Advanced Processing Solutions Team (APS) is working to develop next generation high performance computing systems to meet the mission demands of the NGMS Networked Information Solutions (NIS) business.

NGMS - APS is seeking cleared or clearable Principal or Sr. Principal Digital Verification Engineers to support ASIC and FPGA product development as part of our innovative Digital Technologies Organization.

Essential Duties:

As a Digital Verification Engineer you will work closely with design and verification engineers and will utilize your knowledge of modern verification methods, tools and techniques. The individual will perform functional verification of register transfer level (RTL) code of a complex ASIC at block level and SOC level using UVM (Universal Verification Methodology) and SystemVerilog and Cadence Xcelium simulation tool. This task includes but not limited to development of test bench, tests, verification IP (VIP), verification models, coverage models, extensive simulation and debug, code coverage and functional coverage, generation and analysis of reports and metrics, documentation etc. This candidate will have an ability to operate in a team environment and collaborate across the different teams as required to accomplish the goals.

This position is located in Beavercreek, OH near Dayton, OH.

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Basic Qualifications:

• Bachelor's degree in Electrical Engineering or other Engineering discipline with 5 years of relevant experience; or Master's with 3 years of relevant experience; or PhD with 0 years of experience.

OR

• Bachelor's degree in Electrical Engineering or other Engineering discipline with 9 years of relevant experience; or Master's with 7 years of relevant experience; or PhD with 3 years of relevant experience.
• Knowledge of Universal Verification Methodology (UVM).
• Experience developing test plans, participating in reviews, test development and RTL debugging.
• US Citizenship with the ability to obtain and maintain Secret Security Clearance.

Preferred Qualifications:

• Experience in HDL (VHDL/Verilog) and SystemVerilog (HVL).
• Experience with SystemVerilog Assertions (SVA).
• Familiarity with a coverage-driven verification methodology from planning through closure.
• Knowledge of industry standard interfaces.
• Experience with object oriented programming languages and concepts.
• Experience with Mentor Graphics and/or Cadence Verification tools.
• ASIC/ASIC Design experience.
• Knowledge of digital signal processing.
• Experience with scripting languages (Bash, Perl, Python, Tcl).
• Active Secret security clearance.

This position offers the option of a 9/80 work schedule. The 9/80 schedule allows employees who work nine-hour days Monday through Thursday to take every other Friday off.

Salary Range: 101400 - 152200 Salary Range 2: 125520 - 188600

Employees may be eligible for a discretionary bonus in addition to base pay. Annual bonuses are designed to reward individual contributions as well as allow employees to share in company results. Employees in Vice President or Director positions may be eligible for Long Term Incentives. In addition, Northrop Grumman provides a variety of benefits including health insurance coverage, life and disability insurance, savings plan, Company paid holidays and paid time off (PTO) for vacation and/or personal business.

The health and safety of our employees and their families is a top priority. With the continuing impacts of COVID-19 around the world, we are taking action to protect the health and well-being of our colleagues and maintain the safety of the communities where we operate. As a federal contractor, and consistent with Executive Order 14042 (https://www.saferfederalworkforce.gov/contractors/) we will require all newly hired employees in the United States to be fully vaccinated by January 18, 2022 or by your start date if it is after January 18th. Federal guidance allows for disability/medical and religious accommodations with respect to the vaccine requirement. Any requested accommodations must be reviewed and approved (if applicable) in advance of your start date.

Northrop Grumman is committed to hiring and retaining a diverse workforce. We are proud to be an Equal Opportunity/Affirmative Action Employer, making decisions without regard to race, color, religion, creed, sex, sexual orientation, gender identity, marital status, national origin, age, veteran status, disability, or any other protected class. For our complete EEO/AA and Pay Transparency statement, please visit http://www.northropgrumman.com/EEO. U.S. Citizenship is required for most positions.